אירועים והרצאות בפקולטה למדעי המחשב ע"ש הנרי ומרילין טאוב

Modern CPUs rely on largely undocumented performance mechanisms - including speculative execution, branch prediction, prefetching, and store-load reordering - that have repeatedly introduced unintended security vulnerabilities.

Spectre and Meltdown demonstrated that speculative execution combined with microarchitectural side channels can leak across security boundaries, and despite extensive mitigations, new leaks continue to emerge.

Arm CPUs, which power the vast majority of smartphones and are increasingly prevalent in laptops, HPC systems, and datacenters, have received substantially less scrutiny than x86-64, yet are vulnerable to Spectre-class attacks and Arm-specific attacks such as TikTag and PACMAN.

A recurring pattern underlies many of these leaks: instructions impose preconditions on their operands - for example, a matching MTE tag or valid pointer signature - and violating these preconditions can cause faults or other attacker-observable microarchitectural effects. We port Revizor, a black-box fuzzer based on model-based relational testing, to AArch64, add headless fuzzing of remote CPUs, and extend it to Arm-specific features including MTE and PAuth. We further introduce a novel methodology for systematically fuzzing how instructions handle operands that violate their preconditions, enabling us to uncover a previously unknown leak arising from CPU canonicality and alignment checks on loads, stores, and indirect branches.

We demonstrate the leak on the Neoverse N3 and Google Tensor G3, spanning server-class and mobile Arm CPUs, and show that it crosses both privilege (EL0–EL2) and virtualization (attacker-VM to victim-host) boundaries. Finally, we weaponize the leak with two distinct ROP chains, built from musl and OpenSSL, achieving arbitrary reads from a victim process's address space and, in the OpenSSL case, recovering a complete RSA-2048 private key.