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בית-ספר קיץ השלישי של המרכז להנדסת מחשבים
- יום ראשון, 2.8.2015, 11:30
- מרכז הנדסת מחשבים, בניין פישבך, טכניון
NetFPGA Summer Course 2015
Speakers: Noa Zilberman & Yury Audzevich
Host: Mark Silberstein
NetFPGA is an open source platform enabling researchers and instructors to build high-speed hardware-accelerated networking systems. The NetFPGA is the de-factor experimental platform for line-rate implementations of network research and it has a family of boards, supporting from 1GE to 100GE. This course will provide an introduction to prototyping and using high bandwidth networking devices on the NetFPGA – SUME platform, and discuss considerations in architecture and design for high performance devices. During the course the students will design and implement a project.
This course is focused on the NetFPGA-SUME platform. Attendees will utilize a Linux-based PC equipped with NetFPGA hardware. Basic understanding of Ethernet switching and network routing is expected. Past experience with Verilog is useful but not required.
The course is intended for students and researchers interested in developing new hardware-accelerated network applications.
The course attendance is free, but requires registration. Register here.
For more information click here.
Note that the Technion students who take the course for academic credit will get priority in accessing NetFPGA hardware.
Short bio of our Tutors:
Noa Zilberman is a Research Associate at the University of Cambridge Computer Laboratory in England. Zilberman has over 15 years of industrial experience in the telecommunication and semiconductor industries. In her last role, Zilberman was a senior principal chip architect in Broadcom’s Network Switching group. Her research interests include open-source research using the NetFPGA platform, switching architectures, high speed interfaces, network measurements and Internet topology. Zilberman is a Senior Member of IEEE, a member of ACM and Usenix, and has a PhD in Electrical Engineering from Tel Aviv University.
Yury Audzevich is a Research Associate at the University of Cambridge Computer Laboratory in England. He is an expert on energy-efficient designs for high-bandwidth networking devices, and was the lead researcher of CONTEST (CONfigurable Transceiver Energy uSage Toolkit). Previously, he was an Alcatel-Lucent Research Associate at the University of Trento. His current research interests lie in the field of reconfigurable systems, circuit design and energy-efficiency aspects in communication architectures. Audzevich obtained his PhD in Information and Telecommunication technologies from the University of Trento.