Uzi Vishkin (University of Maryland)
Thursday, 20.4.2017, 11:00
General-Purpose (GP) CPUs are a quintessential example for “engineering for serendipity” as their current ubiquity seems to exceed the wildest dreams of its originators. Alas, in 2017, the only off-the-shelf GPCPU is a single core performing only marginally better since 2004, when an era of phenomenal GP performance growth ended. Furthermore, once technology constraints forced a transition to many-cores, CPU designers chose to volunteer general programmers to help achieve performance by overcoming design challenges, a practice that was limited before to highly specialized software developers. This did not sit well with many programmers.
Effective (hardware and software system) support of lock-step parallel programming has been the holy grail of the theory of parallel algorithms, as it allows: (a) turning any serial algorithm into a parallel one, and (b) harnessing PRAM algorithms as-is. (Parallel random access machineis is the main theory of parallel algorithms.) Setting the parallel programmer free to productively pursue apps (through such lock-step, or even serial programming) will incentivize application SW vendors, and bring back Andy Grove’s “software spiral”—the business model that made the serial GP CPUs of yore so prosperous. I will review the recent stage of our prototyping work that demonstrated feasibility of this overall approach. I will also discuss positioning prospects towards the flux of machine learning heuristics. Finally, I will discuss constrains and opportunities for making progress: 1. many business executives are not keen on engineering for serendipity, and 2. some of the (smart) CPU designers they would consult do not see why programmers cannot take part in solving their design problems. However, 3. due to the non-trivial cost involved, the main opportunity I see is by making the case for nontrivial infrastructure-type public funding.
Uzi Vishkin has been Professor at the University of Maryland Institute for Advanced Computer Studies (UMIACS) since 1988. Prior affiliations included Technion, IBM T.J. Watson, NYU, and Tel Aviv University, where he was also CS Chair. Per his ACM Fellow citation, he “played a leading role in forming and shaping what thinking in parallel has come to mean in the fundamental theory of Computer Science”. Later, his team’s work on his explicit multi-threaded (XMT) many-core architecture refuted the common wisdom that the richest theory of parallel algorithms, known as PRAM, is irrelevant for practice. He is an ISI-Thompson Highly Cited Researcher and a Maryland Innovator of the Year for his XMT venture. His B.Sc. and M.Sc. is in Mathematics, Hebrew University and a 1981 D.Sc. in Computer Science, Technion, where the original seeding of the direction being discussed took place.