List of Publications, 1989-1995.     
-------------------------------

[DGY89a] I. David,  R. Ginosar and M. Yoeli     ``An  Efficient
Implementation  of Boolean Functions and Finite State Machines as
Self-Timed Circuits'', Computer Architecture News (CAN), pp.  91-
104, Dec. 89.

[DGY92a] I. David,  R.  Ginosar  and  M.  Yoeli,  ``An  Efficient
Implementation  of  Boolean  Functions  as Self-Timed Circuits,''
IEEE Transactions on Computers, Jan. 1992, pp. 2-11.

[DGY92b] I.  David,  R.  Ginosar  and  M.  Yoeli,  ``Implementing
Sequential  Machines  as Self-Timed Circuits,'' IEEE Transactions
on Computers, Jan. 1992, pp. 12-17.

[DGY95] I. David, R. Ginosar and M. Yoeli, "Self-Timed is Self-Checking",
J. Electronic Testing: Theory and Applications, 6(2), April 1995, pp.219-
228.   

Publications in Refereed Conference Proceedings
-----------------------------------------------

[BSY92a]H. Belhadj, G.Saucier and M. Yoeli, "Synthesis of
        Delay-insensitive Circuits Specified by Trace Graphs".
        ACM-SIGDA/IFIP. Int'l Design Automation Workshop, 27-29
        June 1992, Moscow, Russia. 
[BSY92b]H. Belhadj, G. Saucier and M. Yoeli, "From Trace Graphs to
        Modular Delay-Insensitive Circuits",  26th Hawaii
        International Information Systems Conference, 6-8 January 1993,
        Hawaii. 
[BSY92c]H. Belhadj, G. Saucier and M. Yoeli, "Asynchronous VLSI
        Circuits Synthesis : The State of the Art", 
        EDAC-EUROASIC'93. 
[DGY93] I. David, R. Ginosar and M. Yoeli, "Self-Timed Architecture
        of a Reduced Instruction Set Computer", in: S.Furber and M.Edwards
        (eds.), Asynchronous Design Methodologies, Elsevier Science Publ.,
        1993, pp.29-43.    


Invited Lectures
----------------

[Yo91] M.Yoeli, "Formal Verification of Modular Networks", French-Israeli
       Workshop on Formal Verification, Grenoble, Oct.1991.

[YSBS92] M.Yoeli, N.Shintel, H.Belhadj and G.Saucier, "The Formal Verification
         of a Delay-Insensitive Circuit Synthesis Algorithm", International
         Workshop on Self-Timed Systems, Dagstuhl, Germany, Dec.1992.

[Yo92]   M.Yoeli and V.Varshavsky, Four-day Seminar on Design of Self-Timed
         Systems, Technical University of Helsinki, Finnland, Sept.1992.


Books
-----

[Yo90]  M.Yoeli (ed.) , Formal Verification of Hardware Design,
        Tutorial, IEEE Computer Society Press, 1990.