Technical Report CS0695

TR#:CS0695
Class:CS
Title: A SIMPLE SCHEME FOR SLOT REUSE WITHOUT LATENCY IN DUAL BUS
Authors: O. Sharon and A. Segall
PDFNot Available
Abstract: A simple scheme for slot reuse without latency for the dual bus configuration is studied. The scheme relies on information read in the previous slot and will be referred to as Previous Slot Information (PSI) slot reuse. The scheme requires a minimal addition to the stations hardware and its reliability is high. The efficiency of PSI is checked over a wide range of parameters and is almost as good as Destination Release when uniform traffic is assumed. The scheme can be implemented with or without the addition of erasure nodes.
CopyrightThe above paper is copyright by the Technion, Author(s), or others. Please contact the author(s) for more information

Remark: Any link to this technical report should be to this page (http://www.cs.technion.ac.il/users/wwwb/cgi-bin/tr-info.cgi/1991/CS/CS0695), rather than to the URL of the PDF files directly. The latter URLs may change without notice.

To the list of the CS technical reports of 1991
To the main CS technical reports page

Computer science department, Technion
admin