| TR#: | CS0695 |
| Class: | CS |
| Title: | A SIMPLE SCHEME FOR SLOT REUSE
WITHOUT LATENCY IN DUAL BUS |
| Authors: | O. Sharon and A. Segall |
| Not Available | |
| Abstract: | A simple scheme for slot reuse without latency for the dual bus configuration is studied. The scheme relies on information read in the previous slot and will be referred to as Previous Slot Information (PSI) slot reuse. The scheme requires a minimal addition to the stations hardware and its reliability is high. The efficiency of PSI is checked over a wide range of parameters and is almost as good as Destination Release when uniform traffic is assumed. The scheme can be implemented with or without the addition of erasure nodes. |
| Copyright | The above paper is copyright by the Technion, Author(s), or others. Please contact the author(s) for more information |
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