| TR#: | CS0314 |
| Class: | CS |
| Title: | Mutations and Test for VLSI Chips |
| Authors: | Shmuel Katz |
| CS0314.pdf | |
| Abstract: | Test generation is considered for a family of existing testing methodologies for VLSI chips. The methodologies have in common that errors on a chip are reflected as changes (called mutations) in a program-level description of the implemented algorithms. Testing criteria are developed for two types of mutants, and techniques from program verification are used to define a collection of predicates which input data must satisfy in order to be an adequate test. The actual generation of the values is considered, and it is shown under what conditions a chip which passes such a test is guaranteed error-free. |
| Copyright | The above paper is copyright by the Technion, Author(s), or others. Please contact the author(s) for more information |
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