Technical Report CS0178

Title: An O(log N) Parallel Connectivity Algorithm
Authors: Yossi Shiloach and Uzi Vishkin
Abstract: A parallel algorithm which uses O(n+m) processors to find the connected components of an undirected graph with n vertices and m edges in time O(log n) is presented. We assume that the processors have access to a common memory. Simultaneously access to the same memory location is allowed for both read and write instructions.
CopyrightThe above paper is copyright by the Technion, Author(s), or others. Please contact the author(s) for more information

Remark: Any link to this technical report should be to this page (, rather than to the URL of the PDF files directly. The latter URLs may change without notice.

To the list of the CS technical reports of 1980
To the main CS technical reports page

Computer science department, Technion